LAN9117 Datasheet, PDF (43/114 Pages) SMSC Corporation – HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER

LAN9117
3.13.6 TRANSMIT EXAMPLES
3.13.6.1 TX Example 1
In this example a single, 111-Byte Ethernet packet will be transmitted. This packet is divided into three buffers. The three
buffers are as follows:
Buffer 0:
• 7-Byte “Data Start Offset”
• 79-Bytes of payload data
• 16-Byte “Buffer End Alignment”
Buffer 1:
• 0-Byte “Data Start Offset”
• 15-Bytes of payload data
• 16-Byte “Buffer End Alignment”
Buffer 2:
• 10-Byte “Data Start Offset”
• 17-Bytes of payload data
• 16-Byte “Buffer End Alignment”
Figure 3-15, "TX Example 1" illustrates the TX command structure for this example, and also shows how data is passed
to the TX data FIFO.
Note 3-16
The LAN9117 host bus interface supports 16-bit bus transfers; internally, all data paths are 32-bits
wide. Figure 3-15 and Figure 3-16 describe the host write ordering for pairs of atomic 16-bit
transactions.
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DS00002267A-page 43