LAN9117 Datasheet, PDF (110/114 Pages) SMSC Corporation – HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER

LAN9117
APPENDIX A: DATA SHEET REVISION HISTORY
TABLE A-1: REVISION HISTORY
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY
CORRECTION
DS00002267A (08-22-16) Replaces previous SMSC version Rev. 1.5 (07-11-08)
Rev. 1.5 (07-11-08)
Standard SMSC formatting
Rev. 1.4 (06-20-08)
Table 2-5, “System and
Added text to VDD_CORE and VDD_PLL pin
Power Signals,” on page 10 ^{descriptions that states the pins must not be used}
to supply power to external devices.
Internal Block Diagram
A PLL regulator block was added and the word
“Core” was added to the original regulator block.
Table 2-4, “Serial EEPROM
Interface Signals,” on
page 10
Added note to the EECLK pin: “When the
EEPROM interface is not used, the EECLK pin
must be left unconnected.”
(Per change request 737306-KL0774)
Section 3.5, "Wake-up
Frame Detection," on
page 21 and Section 5.4.1,
"MAC_CR—MAC Control
Register," on page 80
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the WUCSR—Wake-
up Control and Status Register, a broadcast wake-
up frame will wake-up the device despite the state
of the Disable Broadcast Frames (BCAST) bit in
the MAC_CR—MAC Control Register.”
Section 5.4.12, "WUCSR—
Wake-up Control and Status
Register," on page 87
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
Section 5.5.5, "Auto-
negotiation Advertisement,"
on page 90
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
Section 5.5.5, "Auto-
negotiation Advertisement,"
on page 90
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for.” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE
support are advertised, the device will only be
configured to, at most, one of the two settings
upon auto-negotiation completion.”
Section 7.1, "Absolute
Maximum Ratings*," on
page 105 and Section 7.2,
"Operating Conditions**," on
page 105
Removed 1.8V output voltage (VDD_PLL,
VDD_CORE) ratings and notes which stated:
“These pins must not be used to supply power to
other external devices.” These specifications are
not needed by the customer since the regulators
are not to be used for external applications.
DS00002267A-page 110
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