LAN9116 Datasheet, PDF (4/109 Pages) SMSC Corporation – Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

LAN9116
1.0 GENERAL DESCRIPTION
The LAN9116 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where per-
formance, flexibility, ease of integration and system cost control are required. The LAN9116 has been architected to
provide the best price-performance ratio for any 32-bit application with medium-high performance requirements. The
LAN9116 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant.
The LAN9116 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The
simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit and 32-bit micro-
processors and microcontrollers. The LAN9116 includes large transmit and receive data FIFOs to accommodate high
latency applications. In addition, the LAN9116 memory buffer architecture allows the most efficient use of memory
resources by optimizing packet granularity.
Applications
The LAN9116 is well suited for medium-high-performance embedded applications, including:
• Medium-range cable, satellite and IP set-top boxes
• Digital video recorders
• DVD Recorders/Players
• High-definition televisions
• Digital media clients/servers
• Home gateways
The LAN9116 also supports features which reduce or eliminate packet loss. Its internal 16-KByte SRAM can hold over
200 received packets. If the receive FIFO gets too full, the LAN9116 can automatically generate flow control packets to
the remote node, or assert back-pressure on the remote node by generating network collisions.
The LAN9116 supports numerous power management and wakeup features. The LAN9116 can be placed in a reduced
power mode and can be programmed to issue an external wake signal via several methods, including “Magic Packet”,
“Wake on LAN” and “Link Status Change”. This signal is ideal for triggering system power-up using remote Ethernet
wakeup events. The device can be removed from the low power state via a host processor command.
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