LAN9116 Datasheet, PDF (34/109 Pages) SMSC Corporation – Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

LAN9116
FIGURE 3-13:
TX BUFFER FORMAT
Host Write
Order
31
0
1st
TX Command 'A'
2nd
TX Command 'B'
3rd
Optional offset DWORD0
.
.
.
Optional offset DWORDn
Offset + Data DWORD0
.
.
.
.
.
Last Data & PAD
Optional Pad DWORD0
.
.
.
Last
Optional Pad DWORDn
Figure 3-13, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9116. It should be noted that not all of
the data shown in this diagram is actually stored in the TX data FIFO. This must be taken into account when calculating
the actual TX data FIFO usage. Please refer to Section 3.12.5, "Calculating Actual TX Data FIFO Usage," on page 37
for a detailed explanation on calculating the actual TX data FIFO usage.
3.12.2 TX COMMAND FORMAT
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command precedes the data
to be transmitted. The TX command is divided into two, 32-bit words; TX command ‘A’ and TX command ‘B’.
There is a 16-bit packet tag in the TX command ‘B’ command word. Packet tags may, if host software desires, be unique
for each packet (i.e., an incrementing count). The value of the tag will be returned in the RX status word for the associ-
ated packet. The Packet tag can be used by host software to uniquely identify each status word as it is returned to the
host.
Both TX command ‘A’ and TX command ‘B’ are required for each buffer in a given packet. TX command ‘B’ must be
identical for every buffer in a given packet. If the TX command ‘B’ words do not match, the Ethernet controller will assert
the Transmitter Error (TXE) flag.
DS00002268A-page 34
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