LAN9116 Datasheet, PDF (36/109 Pages) SMSC Corporation – Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

LAN9116
TABLE 3-12: TX COMMAND 'B' FORMAT (CONTINUED)
Bits
Description
12
Disable Ethernet Frame Padding. When set, this bit prevents the automatic addition of padding to
an Ethernet frame of less than 64 bytes. The CRC field is also added despite the state of the Add
CRC Disable field.
11
Reserved. These bits are reserved. Always write zeros to this field to provide future compatibility.
10:0 Packet Length (bytes). This field indicates the total number of bytes in the current packet. This length
does not include the offset or padding. If the Packet Length field does not match the actual number
of bytes in the packet the Transmitter Error (TXE) flag will be set.
3.12.3 TX DATA FORMAT
The TX data section begins at the third DWORD in the TX buffer (after TX command ‘A’ and TX command ‘B’). The
location of the first byte of valid buffer data to be transmitted is specified in the “Data Start Offset” field of the TX com-
mand ‘A’ word. Table 3-13, "TX DATA Start Offset", shows the correlation between the setting of the LSB’s in the “Data
Start Offset” field and the byte location of the first valid data byte. Additionally, transmit buffer data can be offset by up
to 7 additional DWORDS as indicated by the upper three MSB’s (5:2) in the “Data Start Offset” field.
TABLE 3-13: TX DATA START OFFSET
Data Start Offset [1:0]:
11
First TX Data Byte:
D[31:24]
10
D[23:16]
01
D[15:8]
00
D[7:0]
TX data is contiguous until the end of the buffer. The buffer may end on a byte boundary. Unused bytes at the end of
the packet will not be sent to the MIL for transmission.
The Buffer End Alignment field in TX command ‘A’ specifies the alignment that must be maintained for the associated
buffer. End alignment may be specified as 4-, 16-, or 32-byte. The host processor is responsible for adding the additional
data to the end of the buffer. The hardware will automatically remove this extra data.
3.12.3.1 TX Buffer Fragmentation Rules
Transmit buffers must adhere to the following rules:
• Each buffer can start and end on any arbitrary byte alignment
• The first buffer of any transmit packet can be any length
• Middle buffers (i.e., those with First Segment = Last Segment = 0) must be greater than, or equal to 4 bytes in
length
• The final buffer of any transmit packet can be any length
The MIL operates in store-and-forward mode and has specific rules with respect to fragmented packets. The total space
consumed in the TX FIFO (MIL) must be limited to no more than 2KB - 3 DWORDs (2,036 bytes total). Any transmit
packet that is so highly fragmented that it takes more space than this must be un-fragmented (by copying to a Driver-
supplied buffer) before the transmit packet can be sent to the LAN9116.
One approach to determine whether a packet is too fragmented is to calculate the actual amount of space that it will
consume, and check it against 2,036 bytes. Another approach is to check the number of buffers against a worst-case
limit of 86 (see explanation below).
3.12.3.2 Calculating Worst-Case TX FIFO (MIL) Usage
The actual space consumed by a buffer consists only of any partial DWORD offsets in the first/last DWORD of the buffer,
plus all of the whole DWORDs in between. Any whole DWORD offsets and/or alignments are stripped off before the
buffer even gets into the TX data FIFO, and TX command words are stripped off before the buffer is written to the TX
FIFO, so none of those DWORDs count as space consumed. The worst-case overhead for a TX buffer is 6 bytes, which
assumes that it started on the high byte of a DWORD and ended on the low byte of a DWORD. A TX packet consisting
of 86 such fragments would have an overhead of 516 bytes (6 * 86) which, when added to a 1514-byte max-size transmit
packet (1516 bytes, rounded up to the next whole DWORD), would give a total space consumption of 2,032 bytes, leav-
ing 4 bytes to spare; this is the basis for the "86 fragment" rule mentioned above.
DS00002268A-page 36
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