LAN9116 Datasheet, PDF (23/109 Pages) SMSC Corporation – Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

LAN9116
The host can initiate a reload of the MAC address from the EEPROM by issuing the RELOAD command via the E2P
command (E2P_CMD) register. If the first byte read from the EEPROM is not A5h, it is assumed that the EEPROM is
not present, or not programmed, and the MAC address reload will fail. The “MAC Address Loaded” bit indicates a suc-
cessful reload of the MAC address.
3.9.2 EEPROM HOST OPERATIONS
After the EEPROM controller has finished reading (or attempting to read) the MAC after power-on, hard reset or soft
reset, the host is free to perform other EEPROM operations. EEPROM operations are performed using the E2P_CMD
and E2P data (E2P_DATA) registers. Section 5.3.23, "E2P_CMD – EEPROM Command Register," on page 72 provides
an explanation of the supported EEPROM operations.
If the EEPROM operation is the “write location” (WRITE) or “write all” (WRAL) commands, the host must first write the
desired data into the E2P_DATA register. The host must then issue the WRITE or WRAL command using the E2P_CMD
register by setting the EPC_CMD field appropriately. If the operation is a WRITE, the EPC_ADDR field in E2P_CMD
must also be set to the desired location. The command is executed when the host sets the EPC_BSY bit high. The com-
pletion of the operation is indicated when the EPC_BSY bit is cleared.
If the EEPROM operation is the “read location” (READ) operation, the host must issue the READ command using the
E2P_CMD with the EPC_ADDR set to the desired location. The command is executed when the host sets the EPC_BSY
bit high. The completion of the operation is indicated when the EPC_BSY bit is cleared, at which time the data from the
EEPROM may be read from the E2P_DATA register.
Other EEPROM operations are performed by writing the appropriate command to the EPC_CMD register. The com-
mand is executed when the host sets the EPC_BSY bit high. The completion of the operation is indicated when the
EPC_BSY bit is cleared. In all cases the host must wait for EPC_BSY to clear before modifying the E2P_CMD register.
Note: The EEPROM device powers-up in the erase/write disabled state. To modify the contents of the EEPROM
the host must first issue the EWEN command.
If an operation is attempted, and an EEPROM device does not respond within 30mS, the LAN9116 will timeout, and the
EPC timeout bit (EPC_TO) in the E2P_CMD register will be set.
Figure 3-3, "EEPROM Access Flow Diagram" illustrates the host accesses required to perform an EEPROM Read or
Write operation.
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DS00002268A-page 23