DS1035 Datasheet, PDF (75/106 Pages) Dallas Semiconductor – 3-in-1 High.Speed Silicon Delay Line

DC and Switching Characteristics
MachXO2 Family Data Sheet
sysCONFIG Port Timing Specifications
Symbol
Parameter
All Configuration Modes
t_PRGM
t_PRGMJ
t_INITL
t_DPPINIT
t_DPPDONE
t_IODISS
Slave SPI
PROGRAMN low pulse accept
PROGRAMN low pulse rejection
INITN low time
PROGRAMN low to INITN low
PROGRAMN low to DONE low
PROGRAMN low to I/O disable
f_MAX
t_CCLKH
t_CCLKL
t_STSU
t_STH
t_STCO
t_STOZ
t_STOV
t_SCS
t_SCSS
t_SCSH
Master SPI
CCLK clock frequency
CCLK clock pulse width high
CCLK clock pulse width low
CCLK setup time
CCLK hold time
CCLK falling edge to valid output
CCLK falling edge to valid disable
CCLK falling edge to valid enable
Chip select high time
Chip select setup time
Chip select hold time
f_MAX
t_MCLKH
t_MCLKL
t_STSU
t_STH
t_CSSPI
t_MCLK
MCLK clock frequency
MCLK clock pulse width high
MCLK clock pulse width low
MCLK setup time
MCLK hold time
INITN high to chip select low
INITN high to first MCLK edge
Min.
55
—
—
—
—
—
—
7.5
7.5
2
0
—
—
—
25
3
3
—
3.75
3.75
5
1
100
0.75
Max.
—
25
55
70
80
120
66
—
—
—
—
10
10
10
—
—
—
133
—
—
—
—
200
1
Units
ns
ns
us
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
us
I²C Port Timing Specifications^{1, 2}
Symbol
Parameter
Min.
f_MAX
Maximum SCL clock frequency
—
1. MachXO2 supports the following modes:
• Standard-mode (Sm), with a bit rate up to 100 kbit/s (user and configuration mode)
• Fast-mode (Fm), with a bit rate up to 400 kbit/s (user and configuration mode)
2. Refer to the I²C specification for timing requirements.
Max.
400
Units
KHz
SPI Port Timing Specifications¹
Symbol
Parameter
Min.
Max.
Units
f_MAX
Maximum SCK clock frequency
—
45
MHz
1. Applies to user mode only. For configuration mode timing specifications, refer to sysCONFIG Port Timing Specifications
table in this data sheet.
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