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DS1035 Datasheet, PDF (42/106 Pages) Dallas Semiconductor – 3-in-1 High.Speed Silicon Delay Line | |||
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DC and Switching Characteristics
MachXO2 Family Data Sheet
DC Electrical Characteristics
Over Recommended Operating Conditions
Symbol
Parameter
Condition
Min. Typ. Max. Units
IIL, IIH1, 4
IPU
IPD
Clamp OFF and VCCIO < VIN < VIH (MAX) â
â +175 µA
Clamp OFF and VIN = VCCIO
-10
â
10
µA
Input or I/O Leakage
Clamp OFF and VCCIO - 0.97V < VIN <
VCCIO
-175
â
â
µA
Clamp OFF and 0V < VIN < VCCIO - 0.97V â
â
10
µA
Clamp OFF and VIN = GND
â
â
10
µA
Clamp ON and 0V < VIN < VCCIO
â
â
10
µA
I/O Active Pull-up Current 0 < VIN < 0.7 VCCIO
-30
â -309 µA
I/O Active Pull-down
Current
VIL (MAX) < VIN < VCCIO
30
â
305
µA
IBHLS
Bus Hold Low sustaining
current
VIN = VIL (MAX)
30
â
â
µA
IBHHS
Bus Hold High sustaining
current
VIN = 0.7VCCIO
-30
â
â
µA
IBHLO
Bus Hold Low Overdrive
current
0 ï£ VIN ï£ï VCCIO
â
â
305
µA
IBHHO
Bus Hold High Overdrive
current
0 ï£ VIN ï£ï VCCIO
â
â -309 µA
VBHT3
Bus Hold Trip Points
VIL
(MAX)
â
VIH
(MIN)
V
C1
I/O Capacitance2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = Typ., VIO = 0 to VIH (MAX)
3
5
9
pf
C2
Dedicated Input
Capacitance2
VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,
VCC = Typ., VIO = 0 to VIH (MAX)
3
5.5
7
pf
VCCIO = 3.3V, Hysteresis = Large
â
450
â
mV
VCCIO = 2.5V, Hysteresis = Large
â
250
â
mV
VCCIO = 1.8V, Hysteresis = Large
â
125
â
mV
VHYST
Hysteresis for Schmitt
Trigger Inputs5
VCCIO = 1.5V, Hysteresis = Large
VCCIO = 3.3V, Hysteresis = Small
â
100
â
mV
â
250
â
mV
VCCIO = 2.5V, Hysteresis = Small
â
150
â
mV
VCCIO = 1.8V, Hysteresis = Small
â
60
â
mV
VCCIO = 1.5V, Hysteresis = Small
â
40
â
mV
1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not measured
with the output driver active. Bus maintenance circuits are disabled.
2. TA 25°C, f = 1.0MHz.
3. Please refer to VIL and VIH in the sysIO Single-Ended DC Electrical Characteristics table of this document.
4. When VIH is higher than VCCIO, a transient current typically of 30ns in duration or less with a peak current of 6mA can occur on the high-to-
low transition. For true LVDS output pins in MachXO2-640U, MachXO2-1200/U and larger devices, VIH must be less than or equal to VCCIO.
5. With bus keeper circuit turned on. For more details, refer to TN1202, MachXO2 sysIO Usage Guide.
3-3
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