DS1035 Datasheet, PDF (29/106 Pages) Dallas Semiconductor – 3-in-1 High.Speed Silicon Delay Line

Architecture
MachXO2 Family Data Sheet
Table 2-13. Supported Output Standards
Output Standard
Single-Ended Interfaces
V_CCIO (Typ.)
LVTTL
3.3
LVCMOS33
3.3
LVCMOS25
2.5
LVCMOS18
1.8
LVCMOS15
1.5
LVCMOS12
1.2
LVCMOS33, Open Drain
—
LVCMOS25, Open Drain
—
LVCMOS18, Open Drain
—
LVCMOS15, Open Drain
—
LVCMOS12, Open Drain
—
PCI33
3.3
SSTL25 (Class I)
2.5
SSTL18 (Class I)
1.8
HSTL18(Class I)
1.8
Differential Interfaces
LVDS^{1, 2}
2.5, 3.3
BLVDS, MLVDS, RSDS ²
2.5
LVPECL²
3.3
Differential SSTL18
1.8
Differential SSTL25
2.5
Differential HSTL18
1.8
1. MachXO2-640U, MachXO2-1200/U and larger devices have dedicated LVDS buffers.
2. These interfaces can be emulated with external resistors in all devices.
sysIO Buffer Banks
The numbers of banks vary between the devices of this family. MachXO2-1200U, MachXO2-2000/U and higher
density devices have six I/O banks (one bank on the top, right and bottom side and three banks on the left side).
The MachXO2-1200 and lower density devices have four banks (one bank per side). Figures 2-18 and 2-19 show
the sysIO banks and their associated supplies for all devices.
2-25