DS1035 Datasheet, PDF (28/106 Pages) Dallas Semiconductor – 3-in-1 High.Speed Silicon Delay Line

Architecture
MachXO2 Family Data Sheet
Types of Output Buffers
Differential Output Emulation
Capability
PCI Clamp Support
MachXO2-256,
MachXO2-640
MachXO2-640U,
MachXO2-1200
MachXO2-1200U
MachXO2-2000/U,
MachXO2-4000,
MachXO2-7000
Single-ended buffers with
Single-ended buffers with
complementary outputs (all I/O complementary outputs (all I/O
Single-ended buffers with
banks)
banks)
complementary outputs (all I/O
banks)
Differential buffers with true Differential buffers with true
LVDS outputs (50% on top LVDS outputs (50% on top
side)
side)
All I/O banks
All I/O banks
All I/O banks
No
Clamp on bottom side only Clamp on bottom side only
Table 2-12. Supported Input Standards
VCCIO (Typ.)
Input Standard
3.3V 2.5V 1.8V 1.5 1.2V
Single-Ended Interfaces
LVTTL

²
²
²
LVCMOS33
LVCMOS25

²
²
²
²

²
²
LVCMOS18
²
²

²
LVCMOS15
²
²
²

²
LVCMOS12
²
²
²
²

PCI¹

SSTL18 (Class I, Class II)

SSTL25 (Class I, Class II)

HSTL18 (Class I, Class II)

Differential Interfaces
LVDS


BLVDS, MVDS, LVPECL, RSDS


Differential SSTL18 Class I, II

Differential SSTL25 Class I, II

Differential HSTL18 Class I, II

1. Bottom banks of MachXO2-640U, MachXO2-1200/U and higher density devices only.
2. Reduced functionality. Refer to TN1202, MachXO2 sysIO Usage Guide for more detail.
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