MC68HC11F1_13 Datasheet, PDF (94/158 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
OR — Overrun Error Flag
OR is set if a new character is received before a previously received character is read
from SCDR. Clear the OR flag by reading SCSR and then reading SCDR.
0 = No overrun
1 = Overrun detected
NF — Noise Error Flag
NF is set if majority sample logic detects anything other than a unanimous decision.
Clear NF by reading SCSR and then reading SCDR.
0 = Unanimous decision
1 = Noise detected
FE — Framing Error
FE is set when a zero is detected where a stop bit was expected. Clear the FE flag by
reading SCSR and then reading SCDR.
0 = Stop bit detected
1 = Zero detected
Bit 0 — Not implemented
Always reads zero
7.6.5 Baud Rate Register
Use this register to select different baud rates for the SCI system. The SCP[1:0] bits
select the prescaler rate for the SCR[2:0] bits. Together, these five bits provide multi-
ple baud rate combinations for a given crystal frequency. Normally, this register is writ-
ten once during initialization. The prescaler is set to its fastest rate by default out of
reset, and can be changed at any time. Refer to Table 7-1 and Table 7-2 for normal
baud rate selections.
BAUD — Baud Rate
Bit 7
6
TCLR
—
RESET:
0
0
5
SCP1
0
4
SCP0
0
3
RCKB
0
2
SCR2
U
TCLR — Clear Baud Rate Counters (Test)
SCP[1:0] — SCI Baud Rate Prescaler Selects
Refer to the SCI baud rate generator block diagram.
1
SCR1
U
Bit 0
SCR0
U
Prescaler
SCP1 SCP0
0
0
0
1
1
0
1
1
Table 7-1 Baud Rate Prescaler Selection
Divide Internal
Clock By
1
3
4
13
4.0
62500
20833
15625
4800
4.9152
76800
25600
19200
5907
Crystal Frequency (MHz)
8.0
12.0
125000 187500
41667
62500
31250
46875
9600
14423
16.0
25000
83332
62500
19200
$102B
20.0
312500
104165
78125
24000
SERIAL COMMUNICATIONS INTERFACE
MC68HC11F1
7-8
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