MC68HC11F1_13 Datasheet, PDF (93/158 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
RWU — Receiver Wakeup Control
0 = Normal SCI receiver
1 = Wakeup enabled and receiver interrupts inhibited
SBK — Send Break
At least one character time of break is queued and sent each time SBK is written to
one. As long as the SBK bit is set, break characters are queued and sent. More than
one break may be sent if the transmitter is idle at the time the SBK bit is toggled on
and off, as the baud rate clock edge could occur between writing the one and writing
the zero to SBK.
0 = Break generator off
1 = Break codes generated
7.6.4 Serial Communication Status Register
The SCSR provides inputs to the interrupt logic circuits for generation of the SCI sys-
tem interrupt.
SCSR — SCI Status Register
$102E
Bit 7
6
5
4
3
2
1
Bit 0
TDRE
TC
RDRF
IDLE
OR
NF
FE
—
RESET:
1
1
0
0
0
0
0
0
TDRE — Transmit Data Register Empty Flag
This flag is set when SCDR is empty. Clear the TDRE flag by reading SCSR and then
writing to SCDR.
0 = SCDR busy
1 = SCDR empty
TC — Transmit Complete Flag
This flag is set when the transmitter is idle (no data, preamble, or break transmission
in progress). Clear the TC flag by reading SCSR and then writing to SCDR.
0 = Transmitter busy
1 = Transmitter idle
RDRF — Receive Data Register Full Flag
This flag is set if a received character is ready to be read from SCDR. Clear the RDRF
flag by reading SCSR and then reading SCDR.
0 = SCDR empty
1 = SCDR full
IDLE — Idle Line Detected Flag
This flag is set if the RxD line is idle. Once cleared, IDLE is not set again until the RxD
line has been active and becomes idle again. The IDLE flag is inhibited when RWU =
1. Clear IDLE by reading SCSR and then reading SCDR.
0 = RxD line is active
1 = RxD line is idle
SERIAL COMMUNICATIONS INTERFACE
TECHNICAL DATA
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