MC68HC11F1_13 Datasheet, PDF (83/158 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
impedance state, as neither the N-channel nor the P-channel devices are active. It is
customary to have an external pull-up resistor on lines that are driven by open-drain
devices. Port C can only be configured for wired-OR operation when the MCU is in sin-
gle-chip or bootstrap modes.
PORTC — Port C Data
S. Chip or
Boot:
RESET:
Expan. or
Test:
Bit 7
PC7
PC7
I
DATA7
6
PC6
PC6
I
DATA6
5
PC5
PC5
I
DATA5
4
3
PC4
PC3
PC4
PC3
I
I
DATA4 DATA3
2
PC2
PC2
I
DATA2
1
PC1
PC1
I
DATA1
Bit 0
PC0
PC0
I
DATA0
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DDRC — Data Direction Register for Port C
RESET:
Bit 7
DDC7
0
6
DDC6
0
5
DDC5
0
4
DDC4
0
3
DDC3
0
DDC[7:0] — Data Direction for Port C
0 = Input
1 = Output
2
DDC2
0
1
DDC1
0
Bit 0
DDC0
0
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6.4 Port D
In all modes, port D bits [5:0] can be used either for general-purpose I/O, or with the
SCI and SPI subsystems. During reset, port D pins are configured as high impedance
inputs (DDRD bits cleared).
The DWOM control bit in the SPCR register disables port D’s P-channel output drivers.
Because the N-channel driver is not affected by DWOM, setting DWOM causes port
D to become an open-drain-type output port suitable for wired-OR operation. In wired-
OR mode, (PORTD bits are at logic level zero), pins are actively driven low by the N-
channel driver. When a port D bit is at logic level one, the associated pin is in a high-
impedance state, as neither the N-channel nor the P-channel devices are active. It is
customary to have an external pull-up resistor on lines that are driven by open-drain
devices. Port D can be configured for wired-OR operation in any operating mode.
PORTD — Port D Data
Bit 7
6
—
—
RESET: 0
0
Alt. Pin
Func.: —
—
5
4
3
2
1
PD5
PD4
PD3
PD2
PD1
I
I
I
I
I
SS
SCK
MOSI
MISO
TxD
$1008
Bit 0
PD0
I
RxD
PARALLEL INPUT/OUTPUT
TECHNICAL DATA
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