MC68HC11F1_13 Datasheet, PDF (74/158 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
POWER-ON RESET
(POR)
DELAY 4064 E CYCLES
HIGHEST
EXTERNAL RESET
PRIORITY
CLOCK MONITOR FAIL
(WITH CME = 1)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFE, FFFF (VECTOR FETCH)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFC, FFFD (VECTOR FETCH)
LOWEST
COP WATCHDOG TIMEOUT
(WITH NOCOP = 0)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFA, FFFB (VECTOR FETCH)
SET S, X, AND I BITS
IN CCR
RESET MCU
HARDWARE
1A
BEGIN AN INSTRUCTION
SEQUENCE
YES
X BIT IN
CCR SET
?
NO
XIRQ
YES
PIN LOW
?
NO
1B
STACK CPU
REGISTERS
SET X AND I BITS
FETCH VECTOR
$FFE4, FFE5
Figure 5-1 Processing Flow Out of Reset (1 of 2)
5-12
RESETS AND INTERRUPTS
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MC68HC11F1
TECHNICAL DATA