MC68HC11F1_13 Datasheet, PDF (58/158 Pages) Freescale Semiconductor, Inc – Technical Data

Freescale Semiconductor, Inc.
$0000
EXP
MODE
ADDR
SPACE
$FFFF
VALID BASE ADDR BITS: N/A
GSIZA : GSIZB : GSIZC: 0 : 0 : 0
SIZE: 64K
GA15
0:0:1
32K
GA[15:14]
0:1:0
16K
GA[15:13]
0:1:1
8K
GA[15:12]
1:0:0
4K
GA[15:11]
1:0:1
2K
NOTE: These examples assume a starting address of $0000.
GA[15:10]
1:1:0
1K
GA[15:10]
1:1:1
DISABLED
Figure 4-4 Address Map for General-Purpose Chip Select
CSSTRH — Chip Select Clock Stretch Select
RESET:
Bit 7
IO1SA
0
6
IO1SB
0
5
IO2SA
0
4
IO2SB
0
3
GSTHA
0
2
GSTHB
0
1
PSTHA
0
Bit 0
PSTHB
0
$105C
Table 4-8 Chip Select Clock Stretch Control
Bit A
0
0
1
1
Bit B
0
1
0
1
Clock Stretch Selected
None
1 cycle
2 cycles
3 cycles
IO1SA–IO1SB — I/O Chip Select 1 Clock Stretch Select
Refer to Table 4-8.
IO2SA–IO2SB — I/O Chip Select 2 Clock Stretch Select
Refer to Table 4-8.
GSTHA–GSTHB — General-Purpose Chip Select Clock Stretch Select
Refer to Table 4-8.
PSTHA–PSTHB — Program Chip Select Clock Stretch Select
Refer to Table 4-8.
4-20
OPERATING MODES AND ON-CHIP MEMORY
For More Information On This Product,
Go to: www.freescale.com
MC68HC11F1
TECHNICAL DATA