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MC68HC11F1_13 Datasheet, PDF (48/158 Pages) Freescale Semiconductor, Inc – Technical Data | |||
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Freescale Semiconductor, Inc.
Table 4-4 EEPROM Mapping
EE[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
EEPROM Position
$0E00 â $0FFF
$1E00 â $1FFF
$2E00 â $2FFF
$3E00 â $3FFF
$4E00 â $4FFF
$5E00 â $5FFF
$6E00 â $6FFF
$7E00 â $7FFF
$8E00 â $8FFF
$9E00 â $9FFF
$AE00 â $AFFF
$BE00 â $BFFF
$CE00 â $CFFF
$DE00 â $DFFF
$EE00 â $EFFF
$FE00 â $FFFF
Bit 3 â Not implemented
Always reads one
NOCOP â COP System Disable
0 = COP system enabled (forces reset on time-out)
1 = COP system disabled
Bit 1 â Not implemented
Always reads one
EEON â EEPROM Enable
In single-chip modes EEON is forced to one (EEPROM enabled).
0 = 512 bytes of EEPROM is disabled from the memory map
1 = 512 bytes of EEPROM is present in the memory map
4.3.2.2 INIT Register
The internal registers used to control the operation of the MCU can be relocated on 4-
Kbyte boundaries within the memory space with the use of INIT. This 8-bit special-pur-
pose register can change the default locations of the RAM and control registers within
the MCU memory map. It can be written only once within the first 64 E-clock cycles
after a reset. It then becomes a read-only register.
INIT â RAM and I/O Mapping Register
RESET:
Bit 7
RAM3
0
6
RAM2
0
5
RAM1
0
4
RAM0
0
3
REG3
0
2
REG2
0
1
REG1
0
Bit 0
REG0
1
$103D
4-10
OPERATING MODES AND ON-CHIP MEMORY
For More Information On This Product,
Go to: www.freescale.com
MC68HC11F1
TECHNICAL DATA
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