English
Language : 

MC908QY8CDWE Datasheet, PDF (87/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3
INTERNAL BUS
Functional Description
KBI0
KBIP0
VECTOR FETCH
DECODER
ACKK
RESET
1
0S
KBIE0
TO PULLUP/
PULLDOWN ENABLE
VDD
CLR
D
Q
CK
KEYF
SYNCHRONIZER
KBIx
KBIPx
1
0S
KBIEx
TO PULLUP/
PULLDOWN ENABLE
KBI LATCH
MODEK
IMASKK
KEYBOARD
INTERRUPT
REQUEST
AWUIREQ
(SEE Figure 4-1)
Figure 9-2. Keyboard Interrupt Block Diagram
• Vector fetch or software clear. A KBI vector fetch generates an interrupt acknowledge signal to
clear the KBI latch. Software generates the interrupt acknowledge signal by writing a 1 to ACKK in
KBSCR. The ACKK bit is useful in applications that poll the keyboard interrupt inputs and require
software to clear the KBI latch. Writing to ACKK prior to leaving an interrupt service routine can
also prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions
on the keyboard interrupt inputs. An edge detect that occurs after writing to ACKK latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the KBI vector address.
The KBI vector fetch or software clear and the return of all enabled keyboard interrupt pins to a deasserted
level may occur in any order.
Reset clears the keyboard interrupt request and the MODEK bit, clearing the interrupt request even if a
keyboard interrupt input stays asserted.
9.3.1.2 MODEK = 0
If the MODEK bit is clear, the keyboard interrupt inputs are edge sensitive. The KBIPx bit will determine
whether an edge sensitive pin detects rising or falling edges. A KBI vector fetch or software clear
immediately clears the KBI latch.
The keyboard flag bit (KEYF) in KBSCR can be read to check for pending interrupts. The KEYF bit is not
affected by IMASKK, which makes it useful in applications where polling is preferred.
NOTE
Setting a keyboard interrupt enable bit (KBIEx) forces the corresponding
keyboard interrupt pin to be an input, overriding the data direction register.
However, the data direction register bit must be a 0 for software to read the
pin.
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
85