MC908QY8CDWE Datasheet, PDF (167/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Functional Description
In this case, an overflow can be missed easily. Because no more SPRF interrupts can be generated until
this OVRF is serviced, it is not obvious that bytes are being lost as more transmissions are completed. To
prevent this, either enable the OVRF interrupt or do another read of the SPSCR following the read of the
SPDR. This ensures that the OVRF was not set before the SPRF was cleared and that future
transmissions can set the SPRF bit. Figure 15-10 illustrates this process. Generally, to avoid this second
SPSCR read, enable OVRF by setting the ERRIE bit.
BYTE 1
1
BYTE 2
4
BYTE 3
6
BYTE 4
8
SPRF
OVRF
READ
2
5
SPSCR
READ
SPDR
3
7
1 BYTE 1 SETS SPRF BIT.
2 READ SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
3 READ BYTE 1 IN SPDR,
CLEARING SPRF BIT.
4 BYTE 2 SETS SPRF BIT.
5 READ SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
6 BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
7 READ BYTE 2 IN SPDR, CLEARING SPRF BIT,
BUT NOT OVRF BIT.
8 BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS NOT CLEARED. BYTE 4 IS LOST.
Figure 15-9. Missed Read of Overflow Condition
BYTE 1
SPI RECEIVE
1
COMPLETE
SPRF
BYTE 2
5
BYTE 3
7
BYTE 4
11
OVRF
READ
SPSCR
READ
SPDR
2
4
3
6
9
12
14
8
10
13
1 BYTE 1 SETS SPRF BIT.
2 READ SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
3 READ BYTE 1 IN SPDR,
CLEARING SPRF BIT.
4 READ SPSCR AGAIN
TO CHECK OVRF BIT.
5 BYTE 2 SETS SPRF BIT.
6 READ SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
7 BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
8 READ BYTE 2 IN SPDR,
CLEARING SPRF BIT.
9 READ SPSCR AGAIN
TO CHECK OVRF BIT.
10 READ BYTE 2 SPDR,
CLEARING OVRF BIT.
11 BYTE 4 SETS SPRF BIT.
12 READ SPSCR.
13 READ BYTE 4 IN SPDR,
CLEARING SPRF BIT.
14 READ SPSCR AGAIN
TO CHECK OVRF BIT.
Figure 15-10. Clearing SPRF When OVRF Interrupt Is Not Enabled
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
165