MC908QY8CDWE Datasheet, PDF (6/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
September,
2005
April,
2007
April,
2010
Revision
Level
Description
Page
Number(s)
1
Initial full release
N/A
Chapter 3 Analog-to-Digital Converter (ADC10) Module — Renamed ADCSC
register to ADSCR to be consistent with development tools.
37
Figure 4-1. Auto Wakeup Interrupt Request Generation Logic — Changed
BUSCLK4 to BUSCLK2 and removed reference to CGMXCLK
51
4.3 Functional Description — Reworked for clarity
52
4.6.4 Configuration Register 2 — Changed BUSCLK4 to BUSCLK2
55
4.6.5 Configuration Register 1 — Changed BUSCLK4 to BUSCLK2, added
bit description for SSREC, and removed SSREC from the note
56
2
Chapter 5 Configuration Register (CONFIG) — Changed CGMXCLK to
BUSCLKX4
57
Chapter 13 Enhanced Serial Communications Interface (ESCI) Module —
Changed SCIBDSRC to ESCIBDSRC, CGMXCLK to BUSCLKX4, and
109
BUS_CLK to BUS CLOCK
Table 13-5. ESCI LIN Control Bits — Corrected Functionality column
130
13.9.3 Bit Time Measurement — Corrected first sentence of listing number 1
136
Figure 17-18. Monitor Mode Entry Timing — Changed CGMXCLK to
BUSCLKX4
206
3
Clarify internal oscillator trim register information.
29, 36, 96,
101
MC68HC908QB8 Data Sheet, Rev. 3
4
Freescale Semiconductor