MC908QY8CDWE Datasheet, PDF (225/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

SS
INPUT
SPSCK OUTPUT
CPOL = 0
SS PIN OF MASTER HELD HIGH
1
NOTE
4
SPSCK OUTPUT
CPOL = 1
NOTE
5
MISO
INPUT
MOSI
OUTPUT
MSB IN
11
MASTER MSB OUT
5
4
BITS 6–1
10
BITS 6–1
Note: This first clock edge is generated internally, but is not seen at the SPSCK pin.
a) SPI Master Timing (CPHA = 0)
3.0-Volt SPI Characteristics
6
7
LSB IN
11
MASTER LSB OUT
SS
INPUT
SPSCK OUTPUT
CPOL = 0
SS PIN OF MASTER HELD HIGH
1
5
4
SPSCK OUTPUT
CPOL = 1
5
4
MISO
INPUT
10
MOSI
OUTPUT
MSB IN
11
MASTER MSB OUT
BITS 6–1
10
BITS 6–1
NOTE
6
7
LSB IN
NOTE
MASTER LSB OUT
Note: This last clock edge is generated internally, but is not seen at the SPSCK pin.
b) SPI Master Timing (CPHA = 1)
Figure 18-11. SPI Master Timing
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
223