MC908QY8CDWE Datasheet, PDF (191/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Registers
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of the TIM channel x registers
(TCHxH) inhibits output compares until the low byte (TCHxL) is written.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
Figure 16-14. TIM Channel x Register High (TCHxH)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
Figure 16-15. TIM Channel x Register Low (TCHxL)
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
189