MC908QY8CDWE Datasheet, PDF (47/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

I/O Signals
break, the bit cannot change during the break state as long as BCFE is cleared. After the break, doing the
second step clears the status bit.
3.7 I/O Signals
The ADC10 module shares its pins with general-purpose input/output (I/O) port pins. See Figure 3-1 for
port location of these shared pins. The ADC10 on this MCU uses V_DD and V_SS as its supply and reference
pins. This MCU does not have an external trigger source.
3.7.1 ADC10 Analog Power Pin (V_DDA)
The ADC10 analog portion uses V_DDA as its power pin. In some packages, V_DDA is connected internally
to V_DD. If externally available, connect the V_DDA pin to the same voltage potential as V_DD. External filtering
may be necessary to ensure clean V_DDA for good results.
NOTE
If externally available, route V_DDA carefully for maximum noise immunity
and place bypass capacitors as near as possible to the package.
3.7.2 ADC10 Analog Ground Pin (V_SSA)
The ADC10 analog portion uses V_SSA as its ground pin. In some packages, V_SSA is connected internally
to V_SS. If externally available, connect the V_SSA pin to the same voltage potential as V_SS.
In cases where separate power supplies are used for analog and digital power, the ground connection
between these supplies should be at the V_SSA pin. This should be the only ground connection between
these supplies if possible. The V_SSA pin makes a good single point ground location.
3.7.3 ADC10 Voltage Reference High Pin (V_REFH)
V_REFH is the power supply for setting the high-reference voltage for the converter. In some packages,
V_REFH is connected internally to V_DDA. If externally available, V_REFH may be connected to the same
potential as V_DDA, or may be driven by an external source that is between the minimum V_DDA spec and
the V_DDA potential (V_REFH must never exceed V_DDA).
NOTE
Route V_REFH carefully for maximum noise immunity and place bypass
capacitors as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each
successive approximation step is drawn through the V_REFH and V_REFL loop. The best external component
to meet this current demand is a 0.1 μF capacitor with good high frequency characteristics. This capacitor
is connected between V_REFH and V_REFL and must be placed as close as possible to the package pins.
Resistance in the path is not recommended because the current will cause a voltage drop which could
result in conversion errors. Inductance in this path must be minimum (parasitic only).
3.7.4 ADC10 Voltage Reference Low Pin (V_REFL)
V_REFL is the power supply for setting the low-reference voltage for the converter. In some packages,
V_REFL is connected internally to V_SSA. If externally available, connect the V_REFL pin to the same voltage
potential as V_SSA. There will be a brief current associated with V_REFL when the sampling capacitor is
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
45