MC908QY8CDWE Datasheet, PDF (140/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Enhanced Serial Communications Interface (ESCI) Module
13.9.4 Arbitration Mode
If AM[1:0] is set to 10, the arbiter module operates in arbitration mode. On every rising edge of SCI_TxD
(output of the transmit shift register, see Figure 13-2), the counter is started. When the counter reaches
$38 (ACLK = 0) or $08 (ACLK = 1), RxD is statically sensed. If in this case, RxD is sensed low (for
example, another bus is driving the bus dominant) ALOST is set. As long as ALOST is set, the TxD pin is
forced to 1, resulting in a seized transmission.
If SCI_TxD senses 0 without having sensed a 0 before on RxD, the counter will be reset, arbitration
operation will be restarted after the next rising edge of SCI_TxD.
MC68HC908QB8 Data Sheet, Rev. 3
138
Freescale Semiconductor