MC908QY8CDWE Datasheet, PDF (103/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Registers
ECFS1:ECFS0 — External Crystal Frequency Select Bits
These read/write bits enable the specific amplifier for the crystal frequency range. Refer to oscillator
characteristics table in the Electricals section for information on maximum external clock frequency
versus supply voltage.
ECFS1
0
0
1
1
ECFS0
0
1
0
1
External Crystal Frequency
8 MHz – 32 MHz
1 MHz – 8 MHz
32 kHz – 100 kHz
Reserved
ECGON — External Clock Generator On Bit
This read/write bit enables the OSC1 pin as the clock input to the MCU, so that the switching process
can be initiated. This bit is cleared by reset. This bit is ignored in monitor mode with the internal
oscillator bypassed.
1 = External clock enabled
0 = External clock disabled
ECGST — External Clock Status Bit
This read-only bit indicates whether an external clock source is engaged to drive the system clock.
1 = An external clock source engaged
0 = An external clock source disengaged
11.8.2 Oscillator Trim Register (OSCTRIM)
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
TRIM7 TRIM6 TRIM5 TRIM4 TRIM3 TRIM2 TRIM1
1
0
0
0
0
0
0
Figure 11-5. Oscillator Trim Register (OSCTRIM)
Bit 0
TRIM0
0
TRIM7–TRIM0 — Internal Oscillator Trim Factor Bits
These read/write bits change the internal capacitance used by the internal oscillator. By measuring the
period of the internal clock and adjusting this factor accordingly, the frequency of the internal clock can
be fine tuned. Increasing (decreasing) this factor by one increases (decreases) the period by
approximately 0.2% of the untrimmed oscillator period. The oscillator period is based on the oscillator
frequency selected by the ICFS bits in OSCSC.
Applications using the internal oscillator should copy the internal oscillator trim value at location $FFC0
into this register to trim the clock source.
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
101