MC908QY8CDWE Datasheet, PDF (132/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Enhanced Serial Communications Interface (ESCI) Module
13.8.7 ESCI Baud Rate Register
The ESCI baud rate register (SCBR) together with the ESCI prescaler register selects the baud rate for
both the receiver and the transmitter.
NOTE
There are two prescalers available to adjust the baud rate — one in the
ESCI baud rate register and one in the ESCI prescaler register.
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
LINT
LINR
SCP1
SCP0
R
SCR2
SCR1
0
0
0
0
0
0
0
R
= Reserved
Figure 13-16. ESCI Baud Rate Register (SCBR)
Bit 0
SCR0
0
LINT — LIN Transmit Enable
This read/write bit selects the enhanced ESCI features for the local interconnect network (LIN) protocol
as shown in Table 13-5.
LINR — LIN Receiver Bits
This read/write bit selects the enhanced ESCI features for the local interconnect network (LIN) protocol
as shown in Table 13-5.
Table 13-5. ESCI LIN Control Bits
LINT
0
0
0
1
1
1
1
LINR
0
1
1
0
0
1
1
M
Functionality
X Normal ESCI functionality
0 11-bit break detect enabled for LIN receiver
1 12-bit break detect enabled for LIN receiver
0 13-bit generation enabled for LIN transmitter
1 14-bit generation enabled for LIN transmitter
0 11-bit break detect/13-bit generation enabled for LIN
1 12-bit break detect/14-bit generation enabled for LIN
In LIN (version 1.2 and later) systems, the master node transmits a break character which will appear
as 11.05–14.95 dominant bits to the slave node. A data character of 0x00 sent from the master might
appear as 7.65–10.35 dominant bit times. This is due to the oscillator tolerance requirement that the
slave node must be within ±15% of the master node's oscillator. Because a slave node cannot know
if it is running faster or slower than the master node (prior to synchronization), the LINR bit allows the
slave node to differentiate between a 0x00 character of 10.35 bits and a break character of 11.05 bits.
The break symbol length must be verified in software in any case, but the LINR bit serves as a filter,
preventing false detections of break characters that are really 0x00 data characters.
MC68HC908QB8 Data Sheet, Rev. 3
130
Freescale Semiconductor