English
Language : 

MC908QY8CDWE Datasheet, PDF (138/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3
Enhanced Serial Communications Interface (ESCI) Module
ARUN— Arbiter Counter Running Flag
This read-only bit indicates the arbiter counter is running.
1 = Arbiter counter running
0 = Arbiter counter stopped
AROVFL— Arbiter Counter Overflow Bit
This read-only bit indicates an arbiter counter overflow. Clear AROVFL by writing any value to
SCIACTL. Writing 0s to AM1 and AM0 resets the counter keeps it in this idle state.
1 = Arbiter counter overflow has occurred
0 = No arbiter counter overflow has occurred
ARD8— Arbiter Counter MSB
This read-only bit is the MSB of the 9-bit arbiter counter. Clear ARD8 by writing any value to SCIACTL.
13.9.2 ESCI Arbiter Data Register
Read:
Write:
Reset:
Bit 7
ARD7
6
ARD6
5
ARD5
4
ARD4
3
ARD3
2
ARD2
1
ARD1
0
0
0
0
0
0
0
= Unimplemented
Figure 13-19. ESCI Arbiter Data Register (SCIADAT)
Bit 0
ARD0
0
ARD7–ARD0 — Arbiter Least Significant Counter Bits
These read-only bits are the eight LSBs of the 9-bit arbiter counter. Clear ARD7–ARD0 by writing any
value to SCIACTL. Writing 0s to AM1 and AM0 permanently resets the counter and keeps it in this idle
state.
13.9.3 Bit Time Measurement
Two bit time measurement modes, described here, are available according to the state of ACLK.
1. ACLK = 0 — The counter is clocked with one quarter of the bus clock. The counter is started when
a falling edge on the RxD pin is detected. The counter will be stopped on the next falling edge.
ARUN is set while the counter is running, AFIN is set on the second falling edge on RxD (for
instance, the counter is stopped). This mode is used to recover the received baud rate. See
Figure 13-20.
2. ACLK = 1 — The counter is clocked with one half of the ESCI input clock generated by the ESCI
prescaler. The counter is started when a 0 is detected on RxD (see Figure 13-21). A 0 on RxD on
enabling the bit time measurement with ACLK = 1 leads to immediate start of the counter (see
Figure 13-22). The counter will be stopped on the next rising edge of RxD. This mode is used to
measure the length of a received break.
MC68HC908QB8 Data Sheet, Rev. 3
136
Freescale Semiconductor