MC908QY8CDWE Datasheet, PDF (110/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Input/Output Ports (PORTS)
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
Bit 7
Read:
PTBPUE7
Write:
6
PTBPUE6
5
PTBPUE5
4
PTBPUE4
3
PTBPUE3
2
PTBPUE2
1
PTBPUE2
Bit 0
PTBPUE0
Reset: 0
0
0
0
0
0
0
0
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
PTBPUE[7:0] — Port B Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port B pins
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
12.3.4 Port B Summary Table
Table 12-2 summarizes the operation of the port A pins when used as a general-purpose input/output
pins.
Table 12-2. Port B Pin Functions
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB
Read/Write
0
X⁽¹⁾
Input, Hi-Z⁽²⁾
DDRB7–DDRB0
1
X
Output
DDRB7–DDRB0
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect the input.
Accesses to PTB
Read
Write
Pin
PTB7–PTB0⁽³⁾
Pin
PTB7–PTB0
MC68HC908QB8 Data Sheet, Rev. 3
108
Freescale Semiconductor