MC908QY8CDWE Datasheet, PDF (177/232 Pages) Freescale Semiconductor, Inc – Addendum to MC68HC908QB8, rev. 3

Chapter 16
Timer Interface Module (TIM)
16.1 Introduction
This section describes the timer interface module (TIM). The TIM module is a 4-channel timer that
provides a timing reference with input capture, output compare, and pulse-width-modulation functions.
The TIM module shares its pins with general-purpose input/output (I/O) port pins. See Figure 16-1 for port
location of these shared pins.
16.2 Features
Features include the following:
• Four input capture/output compare channels
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered output compare pulse-width modulation (PWM) signal generation
• Programmable clock input
– 7-frequency internal bus clock prescaler selection
– External clock input pin if available, See Figure 16-1
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• Counter stop and reset bits
16.3 Functional Description
Figure 16-2 shows the structure of the TIM. The central component of the TIM is the 16-bit counter that
can operate as a free-running counter or a modulo up-counter. The counter provides the timing reference
for the input capture and output compare functions. The TIM counter modulo registers, TMODH:TMODL,
control the modulo value of the counter. Software can read the counter value, TCNTH:TCNTL, at any time
without affecting the counting sequence.
The four TIM channels are programmable independently as input capture or output compare channels.
16.3.1 TIM Counter Prescaler
The TIM clock source is one of the seven prescaler outputs or the external clock input pin, TCLK if
available. The prescaler generates seven clock rates from the internal bus clock. The prescaler select
bits, PS[2:0], in the TIM status and control register (TSC) select the clock source.
MC68HC908QB8 Data Sheet, Rev. 3
Freescale Semiconductor
175