83C795 Datasheet, PDF (38/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

ETHERNET SYSTEM CONTROLLER REGISTERS
83C795
Bits 3-0: CT3-CT0, Collision Counter
T hes e bits indicate the value of the collis ion
counter. T hey are always readable.
5.2.5 CRCCNT - CRC Error Counter
Normal Map R ead Port = 0:1E
Linked-List Map R ead Port = 0:1E
T his regis ter is incremented by the receive unit
when a packet is received with a CR C error. Only
packets whos e addres s is recognized will be
includedin this tally. When a’runt’frameis received
with a CR C error, CR CCNT is incremented if
R CON.R UNT S is enabled (s ee page 32). T he
counter will increment to 255 and s tick if additional
CR C errors are detected. T he counter is cleared
when read.
BIT
7 CT7
6 CT6
5 CT5
4 CT4
3 CT3
2 CT2
1 CT1
0 CT0
CRCCNT
RESET
0
0
0
0
0
0
0
0
5.2.6 CURR - Current Frame Buffer Pointer
Register
Normal Map R ead/Write Port = 1:17
T his regis ter points to the firs t buffer us ed for
s torage of the pres ent frame. It is used by DMA as
a backup addres s for recovering buffers in cas e of
a flawed packet and facilitates s torage of buffer
header information. T he CUR R register s hould be
initializedto the same value as R S T AR T (s ee page
33) andnot alteredthereafter by theuser unles s the
controller is res et. Only A08-A15 are s pecified
s i nce al l buffer s ar e aligned on 256-byte
boundaries .
BIT
7 A15
6 A14
5 A13
4 A12
3 A11
2 A10
1 A09
0 A08
CURR
RESET
X
X
X
X
X
X
X
X
5.2.7 CURRH - Current Frame Buffer
Descriptor Pointer Register High
Linked-List Map R ead/Write Port = 1:17
T his regis ter is one of a pair of registers (CUR R H
and CUR R L) that point to the firs t buffer descriptor
us ed for s torage of the pres ent frame. T hey are
us ed by DMA as a backup addres s for recovering
buffers in the cas e of a flawed packet and to
facilitate s torage of buffer header information.
Neither the CUR R H nor CUR R L regis ters s hould
be altered by the user. T hey are acces s ible for tes t
purposes only.
BIT
7 A15
6 A14
5 A13
4 A12
3 A11
2 A10
1 A09
0 A08
CURRH
RESET
X
X
X
X
X
X
X
X
5.2.8 CURRL - Current Frame Buffer
Descriptor Pointer Register Low
Linked-List Map R ead/Write Port = 0:13
T his regis ter is one of a pair of registers (CUR R H
and CUR R L) that point to the firs t buffer descriptor
us ed for s torage of the pres ent frame. T hey are
us ed by DMA as a backup addres s for recovering
buffers in the cas e of a flawed packet and to
facilitate s torage of buffer header information.
Neither the CUR R H nor CUR R L regis ters s hould
be altered by the user. T hey are acces s ible for tes t
purposes only.
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