83C795 Datasheet, PDF (132/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
DC operating characteristics 90, 92
Deserialization of the receiver 70
Designating linked-list buffering 26
Designating ring buffering 26, 79
Designating the next DMA buffer 30
Determining the cause of an interrupt 28
DMA controller 65
assembly and disassembly latches 65
loopback testing 65
memory interface 68
memory interface unit (MIU) 65
microcontroller 67
DMA controller next buffer register 30
DMA memory interface 67
DMA microcontroller 67
E
Early receive warning 71
Early receive warning count register 71
Early receive warning enable field 27
Early receive warning field 28
Early transmit checking 78
Early transmit checking (ENETCH & DISETCH)
fields 24
Early transmit underrun protection 78
EECS 6
EEDO 6
EEROM
interface overview 54
recall operations 54
register logic 55
storage of user-defined initial configurations 57
storage of user-defined LAN address 57
storage operations 56
unlocking write operations 56
EEROM address field 15
EEROM controller and its utilization 53
EEROM register 14, 54
Electrical specifications 90 - 92
Emitter-coupled logic 74
Enable interrupts field 17
End-of-transmit interrupt 26
Enhancement register 23, 26, 77
ERFBIT 72
ERW interrupt 71
Extensions beyond 802.3 79
External power supply control 64
F
Features 1
FIFO
structure 68
FIFO overrun field 33
FIFO underrun field 39
Frame alignment error field 33
Functional description 3
G
General control register 21 - 22
General description 1
General purpose output (GPOUT) field 21, 64
Giant frames
accommodating on a non-802.3 network 79
GPOUT 64
GPX pin value selection 16
Group address recognized field 33
H
Hardware support register 16
Heartbeat detection 77
Heartbeat test 75
High RAM address field 20
Host bit width selection 16
Host interface
address decoders 46
basic functions 44
EEROM controller and its utilization 53
I/O address decode 50
I/O-mapped pipe 46
internal bus arbitration 50
interrupt request control logic 52
introduction 44
memory address generation 48
memory bus structure 51
memory cache 44
Plug and Play 57
zero wait state response to the host 50
Host interface internal registers
introduction 14
Host registers
BIOS page register 17
board ID register 19
control register 14
EEROM register 14
general control register 21 - 22
hardware support register 16
I/O address register 19
LAN address registers 18
POS ID registers 19
RAM address register 20
ROM control register 20
119