83C795 Datasheet, PDF (101/136 Pages) List of Unclassifed Manufacturers – Ethernet System Controller

83C795
BUFFER STRUCTURING AND DATA MOVEMENT PROCESSES
the early receive threshold (early receive mode
only). T his is done by checking the interrupt status
regis ter after checking the ring-empty bit.
8.2.2 Linked-List Receiver Buffering
Linked-List R eceiver Bufferingis enabledby abit in
the E nhancement regis ter, E NH.ALT E GO, and is
an alternative to receive ring form of buffering. In
this mode, the receiver directs its input to a group
of individually-s izedbuffers that are not neces s arily
contiguous . All buffers need not be the s ame s ize.
Multiplebuffers can bechainedtogether as needed
to receive an incoming frame.
T hes e buffers are linked together via a table of
buffer des criptors which definethes tartinglocation,
s ize, and us age of all receiver buffers . T his table
controls both thereceivedframes andthe available
buffer pool.
T he des criptor table is treated as a ring of entries
whose s tarting and ending points are defined by a
pair of regis ters (R BE GIN and R E ND) in the LAN
controller. T hes e regis ters are initialized with the
upper 8-bits of address for the firs t location of the
table andthe first location after the endof the table.
R E ND is not within the table. When table
process ing reaches the location defined by R E ND,
it is switched back to R BE GIN. T he table mus t be
aligned with 256-byte boundary in the buffer
memory. E ach entry is 8-bytes long. T he format of
this bufferingarrangement is depictedin Figure8-6.
FIGURE 8-6. LINKED-LIST BUFFER FORMAT
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