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SAM4L_14 Datasheet, PDF (80/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption
ATSAM4L8/L4/L2
8.9.9
Unlimited Flash User Page Read Access
The SMAP can access the User page even if the protected state is set. Prior to operate such an
access, the user should check that the module is not busy by checking that SR.STATE is equal
to zerp. Once the offset of the word to access inside the page is written in ADDR.ADDR, the
read operation can be initiated by writing a one in CR.FSPR. The SR.STATE field will indicate
the FSPR state. Addresses written to ADDR.ADDR must be world aligned. Failing to do so will
result in unpredictable behavior. The result can be read in the DATA register as soon as
SR.DONE rises. The ADDR field is used as an offset in the page, bits outside a page boundary
will be silently discarded. The ADDR register is automatically incremented at the end of the read
operation making possible to dump consecutive words without writing the next offset into
ADDR.ADDR.
8.9.10
32-bit Cyclic Redundancy Check (CRC)
The SMAP unit provides support for calculating a Cyclic Redundancy Check (CRC) value for a
memory area. The algorithm used is the industry standard CRC32 algorithm using the generator
polynomial 0xEDB88320.
8.9.10.1
Starting CRC Calculation
To calculate CRC for a memory range, the start address must be written into the ADDR register,
and the size of the memory range into the LENGTH register. Both the start address and the
length must be word aligned.
The initial value used for the CRC calculation must be written to the DATA register. This value
will usually be 0xFFFFFFFF, but can be e.g. the result of a previous CRC calculation if generat-
ing a common CRC of separate memory blocks.
Once completed, the calculated CRC value can be read out of the DATA register. The read
value must be inverted to match standard CRC32 implementations, or kept non-inverted if used
as starting point for subsequent CRC calculations.
If the device is in protected state, it is only possible to calculate the CRC of the whole flash array.
In most cases this area will be the entire onboard nonvolatile memory. The ADDR, LENGTH,
and DATA registers will be forced to predefined values once the CRC operation is started, and
user-written values are ignored. This allows the user to verify the contents of a protected device.
The actual test is started by writing a one in CR.CRC. A running CRC operation can be can-
celled by disabling the module (write a one in CR.DIS). This has the effect of resetting the
module. The module has to be restarted by issuing an enable command (write a one in CR.EN).
8.9.10.2
Interpreting the Results
The user should monitor the SR register (Refer to Section 8.9.11.2 ”Status Register” on page
83). When the operation is completed SR.DONE is set. Then the SR.BERR and SR.FAIL must
be read to ensure that no bus error nor functional error occured.
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