SAM4L_14 Datasheet, PDF (102/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

ATSAM4L8/L4/L2
Table 9-5. Maximum Clock Frequencies in Power Scaling Mode 1 and RUN Mode
Symbol Parameter
Description
Max
f_CPU
f_PBA
f_PBB
f_PBC
f_PBD
f_GCLK0
f_GCLK1
CPU clock frequency
PBA clock frequency
PBB clock frequency
PBC clock frequency
PBD clock frequency
GCLK0 clock frequency
GCLK1 clock frequency
DFLLIF main reference, GCLK0 pin
DFLLIF dithering and SSGreference,
GCLK1 pin
12
12
12
12
12
16.6
16.6
f_GCLK2
f_GCLK3
f_GCLK4
f_GCLK5
f_GCLK6
f_GCLK7
f_GCLK8
f_GCLK9
f_GCLK10
GCLK2 clock frequency
GCLK3 clock frequency
GCLK4 clock frequency
GCLK5 clock frequency
GCLK6 clock frequency
GCLK7 clock frequency
GCLK8 clock frequency
GCLK9 clock frequency
GCLK10 clock
frequency
AST, GCLK2 pin
CATB, GCLK3 pin
FLO and AESA
GLOC, TC0 and RC32KIFB_REF
ABDACB and IISC
USBC
TC1 and PEVC[0]
PLL0 and PEVC[1]
ADCIFE
6.6
17.3
16.6
26.6
16.6
16.6
16.6
16.6
16.6
f_GCLK11
GCLK11 clock
frequency
Master generic clock. Can be used as
source for other generic clocks
51.2
Oscillator 0 in crystal mode
16
f_OSC0
OSC0 output frequency
Oscillator 0 in digital clock mode
16
f_PLL
PLL output frequency Phase Locked Loop
N/A
f_DFLL
DFLL output frequency Digital Frequency Locked Loop
N/A
f_RC80M
RC80M output
frequency
Internal 80MHz RC Oscillator
N/A
Units
MHz
42023GS–SAM–03/2014
102