SAM4L_14 Datasheet, PDF (141/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

ATSAM4L8/L4/L2
Table 9-54.
Symbol
USPI0
USPI1
USPI2
USPI3
USPI4
USPI5
USART0 in SPI Mode Timing, Master Mode⁽¹⁾
Parameter
Conditions
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
V_VDDIO from
3.0V to 3.6V,
maximum
external
capacitor =
40 pF
Table 9-55.
Symbol
USPI0
USPI1
USPI2
USPI3
USPI4
USPI5
USART1 in SPI Mode Timing, Master Mode⁽¹⁾
Parameter
Conditions
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
V_VDDIO from
3.0V to 3.6V,
maximum
external
capacitor =
40 pF
Table 9-56.
Symbol
USPI0
USPI1
USPI2
USPI3
USPI4
USPI5
USART2 in SPI Mode Timing, Master Mode⁽¹⁾
Parameter
Conditions
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
V_VDDIO from
3.0V to 3.6V,
maximum
external
capacitor =
40 pF
Min
123.2 + t_SAMPLE(2)
24.74 -t_SAMPLE(2)
125.99 + t_SAMPLE(2)
24.74 -t_SAMPLE(2)
Min
69.28 + t_SAMPLE(2)
25.75 -t_SAMPLE(2)
73.12 + t_SAMPLE(2)
28.10 -t_SAMPLE(2)
Min
69.09 + t_SAMPLE(2)
26.52 -t_SAMPLE(2)
72.55 + t_SAMPLE(2)
28.37 -t_SAMPLE(2)
Max
513.56
516.55
Max
99.66
102.01
Max
542.96
544.80
Table 9-57.
Symbol
USPI0
USPI1
USPI2
USPI3
USPI4
USPI5
USART3 in SPI Mode Timing, Master Mode⁽¹⁾
Parameter
Conditions
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
V_VDDIO from
3.0V to 3.6V,
maximum
external
capacitor =
40 pF
Min
147.24 + t_SAMPLE(2)
25.80 -t_SAMPLE(2)
154.9 + t_SAMPLE(2)
26.89 -t_SAMPLE(2)
Max
88.23
89.32
Notes:
1. These values are based on simulation. These values are not covered by test limits in production.
2.
Where:
t_SAMPLE
=
t_SPCK
–
⎛
⎝
------------^t--^S--^P----^C---^K-------------
2 × t_CLKUSART
12_{--⎠⎞ × tCLKUSART}
Units
ns
Units
ns
Units
ns
Units
ns
42023GS–SAM–03/2014
141