SAM4L_14 Datasheet, PDF (136/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

ATSAM4L8/L4/L2
Table 9-48. Unipolar mode, gain=1
PSRR⁽¹⁾
DC supply current⁽¹⁾
fVdd=100kHz, VDDIO=3.6V
fVdd=1MHz, VDDIO=3.6V
VDDANA=3.6V
VDDANA=1.6V,
ADVREFP=1.0V
62
dB
49
1
2
mA
1
1.3
1.
These values are based on simulation. These values are not covered by test limits in production or characterization.
2.
These values are based on characterization and not tested in production, and valid for an input voltage between 10% to 90% of
reference voltage.
9.9.4.1
Inputs and Sample and Hold Acquisition Times
The analog voltage source must be able to charge the sample and hold (S/H) capacitor in the
ADC in order to achieve maximum accuracy. Seen externally the ADC input consists of a resis-
tor ( R_SAMPLE ) and a capacitor ( C_SAMPLE ). In addition, the source resistance ( R_SOURCE ) must be
taken into account when calculating the required sample and hold time. Figure 9-6 shows the
ADC input channel equivalent circuit.
Figure 9-6. ADC Input
VDDANA/2
R_SOURCE
Analog Input
ADx
R_SAMPLE
C_SAMPLE
V_IN
To achieve n bits of accuracy, the C_SAMPLE capacitor must be charged at least to a voltage of
V_CSAMPLE ≥ V_IN × (1 – 2^{–(n + 1)})
The minimum sampling time t_SAMPLEHOLD for a given R_SOURCE can be found using this formula:
t_SAMPLEHOLD ≥ (R_SAMPLE + R_SOURCE) × (C_SAMPLE) × (n + 1) × ln(2)
for a 12 bits accuracy :
t_SAMPLEHOLD ≥ (R_SAMPLE + R_SOURCE) × (C_SAMPLE) × 9, 02
where
t_SAMPLEHOLD = ₂-----_×-----_f-¹-_A----_D-----_C--
42023GS–SAM–03/2014
136