SAM4L_14 Datasheet, PDF (143/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

ATSAM4L8/L4/L2
Figure 9-10. USART in SPI Slave Mode with (CPOL= CPHA= 0) or (CPOL= CPHA= 1)
SPCK
MISO
USPI9
MOSI
USPI10
USPI11
Figure 9-11. USART in SPI Slave Mode, NPCS Timing
SPCK, CPOL=0
SPCK, CPOL=1
NSS
USPI12
USPI14
USPI13
USPI15
Table 9-58.
Symbol
USPI6
USART0 in SPI mode Timing, Slave Mode⁽¹⁾
Parameter
SPCK falling to MISO delay
Conditions
USPI7
MOSI setup time before SPCK rises
USPI8
USPI9
USPI10
USPI11
USPI12
USPI13
USPI14
USPI15
MOSI hold time after SPCK rises
SPCK rising to MISO delay
MOSI setup time before SPCK falls
MOSI hold time after SPCK falls
NSS setup time before SPCK rises
NSS hold time after SPCK falls
NSS setup time before SPCK falls
NSS hold time after SPCK rises
V_VDDIO from
3.0V to 3.6V,
maximum
external
capacitor =
40 pF
Min
56.73 + t_SAMPLE(2) +
t_{CLK_USART}
45.18 -( t_SAMPLE(2) +
t_{CLK_USART )}
56.73 +( t_SAMPLE(2) +
t_{CLK_USART )}
45.18 -( t_SAMPLE(2) +
t_{CLK_USART )}
688.71
-2.25
688.71
-2.25
Max
740.67
670.18
Units
ns
42023GS–SAM–03/2014
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