SAM4L_14 Datasheet, PDF (58/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

ATSAM4L8/L4/L2
7.1.3
BACKUP Mode
The BACKUP mode allows achieving the lowest power consumption possible in a system which
is performing periodic wake-ups to perform tasks but not requiring fast startup time.
The Core domain is powered-off. The internal SRAM and register contents of the Core domain
are lost. The Backup domain is kept powered-on. The 32kHz clock (RC32K or OSC32K) is kept
running if enabled to feed modules that require clocking.
In BACKUP mode, the configuration of the I/O lines is preserved. Refer to Section 9. ”Backup
Power Manager (BPM)” on page 677 to have more details.
7.1.3.1
Entering BACKUP Mode
The Backup mode is entered by using the WFI instruction with the following settings:
• set the SCR.SLEEPDEEP bit to 1. (See the Power Management section in the ARM Cortex-
M4 Processor chapter).
• set the BPM.PSAVE.BKUP bit to 1.
7.1.3.2
Exiting BACKUP Mode
Exit from BACKUP mode happens if a reset occurs or if an enabled wake up event occurs.
The reset sources are:
• BOD33 reset
• BOD18 reset
• WDT reset
• External reset in RESET_N pin
The wake up sources are:
• EIC lines (level transition only)
• BOD33 interrupt
• BOD18 interrupt
• AST alarm, periodic, overflow
• WDT interrupt
The RC32K or OSC32K should be used as clock source for modules if required. The
PMCON.CK32S is used to select one of these two 32kHz clock sources.
Exiting the BACKUP mode is triggered by:
• a reset source: an internal reset sequence is performed according to the reset source. Once
VDDCORE is stable and has the correct value according to RUN0 mode, the internal reset is
released and program execution starts. The corresponding reset source is flagged in the
Reset Cause register (RCAUSE) of the PM.
• a wake up source: the Backup domain is not reset. An internal reset is generated to the Core
domain, and the system switches back to the previous RUN mode. Once VDDCORE is stable
and has the correct value, the internal reset in the Core domain is released and program
execution starts. The BKUP bit is set in the Reset Cause register (RCAUSE) of the PM. It
allows the user to discriminate between the reset cause and a wake up cause from the
BACKUP mode. The wake up cause can be found in the Backup Wake up Cause register
(BPM.BKUPWCAUSE).
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42023GS–SAM–03/2014