SAM4L_14 Datasheet, PDF (68/176 Pages) ATMEL Corporation – Technology for Ultra-low Power Consumption

8.7.3 Block Diagram
Figure 8-3. Enhanced Debug Port Block Diagram
ENHANCED DEBUG PORT
SWJ-DP
TMS
swdio
TDI
traceswo
SW-DP
TDO
TCK
swclk
tms
tdi
JTAG-DP
tdo
tck
RESET_N
test_tap_sel
tms
tdi
BSCAN-TAP
tdo
tck
tck
reset_n
JTAG-FILTER
ATSAM4L8/L4/L2
DAP Bus
boundary_scan
EDP Core reset request
8.7.4 I/O Lines Description
Table 8-1. I/O Lines Description
Name
JTAG Debug Port
Type Description
TCK/SWCLK
I Debug Clock
TDI
I Debug Data in
TDO/TRACESWO
O Debug Data Out
TMS/SWDIO
I Debug Mode Select
RESET_N
I Reset
SWD Debug Port
Type Description
I Serial Wire Clock
- NA
O Trace asynchronous Data Out
I/O Serial Wire Input/Output
I Reset
68
42023GS–SAM–03/2014