DS570 Datasheet, PDF (9/38 Pages) Xilinx, Inc – Supports full-duplex operation

LogiCORE IP XPS Serial Peripheral Interface (SPI) (v2.02a)
Details of XPS SPI IP Core Registers
Software Reset Register (SRR)
The Software Reset Register permits the programmer to reset the XPS SPI IP Core independent of other cores in the
systems. To activate software generated reset, the value of 0x0000_000A must be written to this register. Any other
write access generates an error condition with undefined results and result in error generation. The bit assignment
in the software reset register is shown in Figure 2 and described in Table 6. The effect of an attempt to read this
register will result with undefined data.
X-Ref Target - Figure 2
0
31
Reset
Figure 2: Software Reset Register
DS570_02
Table 5: Software Reset Register (SRR) Description (C_BASEADDR + 0x40)
Bit(s) Name Core Access Reset Value
Description
0 - 31 Reset
Write only
N/A
The only allowed operation on this register is a write of 0x0000000A,
which resets the XPS SPI IP Core.
SPI Control Register (SPICR)
The SPI Control Register (SPICR) gives the programmer control over various aspects of the XPS SPI IP Core. The bit
assignment in the SPICR is shown in Figure 3 and described in Table 7.
X-Ref Target - Figure 3
Master
TransactionRx ^FIFO
Master
Inhibit ^{Reset CPHA}
LOOP
0
22 23 24 25 26 27 28 29 30 31
Reserved
LSB First
Tx FIFO
Reset
Manual Slave ^CPOL
Select Assertion
Enable
SPE
DS570_03
Figure 3: SPI Control Register (C_BASEADDR + 0x60)
Table 6: SPI Control Register (SPICR) Description (C_BASEADDR + 0x60)
Bit(s)
Name
Core
Access
Reset
Value
Description
0 - 21 Reserved
N/A
N/A Reserved
22
LSB First
R/W
LSB First. This bit selects LSB first data transfer format.
’0’ ^{The default transfer format is MSB first.}
’0’ = MSB first transfer format
’1’ = LSB first transfer format
Master
23
Transaction
R/W
Inhibit
Master Transaction Inhibit. This bit inhibits master transactions.
’1’
This bit has no effect on slave operation.
’0’ = Master transactions enabled
’1’ = Master transactions disabled
DS570 June 22, 2011
www.xilinx.com
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Product Specification