DS570 Datasheet, PDF (7/38 Pages) Xilinx, Inc – Supports full-duplex operation

LogiCORE IP XPS Serial Peripheral Interface (SPI) (v2.02a)
Table 2: I/O Signal Descriptions (Cont’d)
Port
Signal Name
Interface I/O
P49 ^MOSI_T
SPI
O
P50 MISO_I
P51 MISO_O
P52 ^MISO_T
SPI
I
SPI
O
SPI
O
P53 SPISEL⁽¹⁾
SPI
I
P54
SS_I[0 : C_NUM_SS_BITS
- 1]
SPI
I
P55
SS_O[0 :
C_NUM_SS_BITS - 1]
SPI
O
P56 SS_T
SPI
O
Initial
State
1
-
1
1
1
-
1
1
Description
3-state enable master output slave input.
Active low
Master input slave output
Master input slave output
3-state enable master input slave output.
Active low
Local SPI slave select active low input.
Must be set to 1 in idle state
Input one-hot encoded. This signal is a dummy signal and
wont be used in the design as chip select input
Output one-hot encoded, active low slave select vector of
length n
3-state enable for slave select. Active low
Notes:
1. SPISEL signal is used as a slave select line when XPS SPI is configured as slave.
Parameter - Port Dependencies
The dependencies between the XPS SPI IP Core design parameters and I/O signals are described in Table 3.
Table 3: Parameter-Port Dependencies
Generic
or Port
Name
Affects
Depends
Relationship Description
Design Parameters
G5
C_SPLB_DWIDTH
C_SPLB_MID_WIDTH
G7
G8
C_SPLB_NUM_MASTERS
G13 C_NUM_SS_BITS
P8, P11,
P34
P6
P37, P38,
P39, P43
P54, P55
-
Affects the number of bits in data bus
This value is calculated as:
G8
log₂(C_SPLB_NUM_MASTERS) with a minimum
value of 1
-
Affects the number of PLB masters
-
Defines the total number of slave select bits
I/O Signals
P6
PLB_masterID[0 :
C_SPLB_MID_WIDTH - 1]
-
P8
PLB_BE[0 :
(C_SPLB_DWIDTH/8) -1]
-
P11
PLB_wrDBus[0 :
C_SPLB_DWIDTH - 1]
-
P34
Sl_rdDBus[0 :
C_SPLB_DWIDTH - 1]
-
P37
Sl_MBusy[0 :
C_SPLB_NUM_MASTERS - 1]
-
G7
Width of the PLB_mastedID varies according to
C_SPLB_MID_WIDTH
G5
Width of the PLB_BE varies according to
C_SPLB_DWIDTH
G5
Width of the PLB_wrDBus varies according to
C_SPLB_DWIDTH
G5
Width of the Sl_rdDBus varies according to
C_SPLB_DWIDTH
G8
Width of the Sl_MBusy varies according to
C_SPLB_NUM_MASTERS
DS570 June 22, 2011
www.xilinx.com
7
Product Specification