DS712 Datasheet, PDF (45/61 Pages) Xilinx, Inc – LogiCORE IP AXI PLBv46 Bridge

INCR Write 1E Beat - Bufferable Error
X-Ref Target - Figure 27
LogiCORE IP AXI PLBv46 Bridge (v2.02.a)
Figure 27: INCR Write 1E Beat - Bufferable Error
DS712_27
DS712 July 25, 2012
www.xilinx.com
45
Product Specification