DS791 Datasheet, PDF (43/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller

LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
System Performance
To measure the system performance (F_MAX) of this core, this core was added as the Device Under Test (DUT) to
Spartan-6 and Virtex-6 FPGA system as shown in Figure 4.
Because the AXI CAN core is used with other design modules in the FPGA, the utilization and timing numbers
reported in this section are estimates only. When this core is combined with other designs in the system, the
utilization of FPGA resources and timing of the design varies from the results reported here.
X-Ref Target - Figure 4
MicroBlaze
Processor
Domain
(M_AXI_IC)
(M_AXI_DC)
MicroBlaze
AXI4
Interconnect
(M_AXI_DP)
AXI4 Domain
AXI DDR
Memory
Controller
AXI CDMA
Memory
D_LMB
I_LMB
BRAM
Controller
AXI4-Lite
Interconnect
Device Under
Test (DUT)
(Low Speed Slave)
AXI INTC
AXI GPIO
AXI UARTLite
LEDs
RS232
MDM
AXI4-Lite Domain
Figure 4: Spartan-6/Virtex-6 FPGA System with the AXI CAN Core as the DUT ^{DS 62 24}
The target FPGA was then filled with logic to drive the LUT and block RAM utilization to approximately 70% and
the I/O utilization to approximately 80%. Using the default tool options and the slowest speed grade for the target
FPGA, the resulting target F_MAX numbers are shown in Table 45.
Table 45: System Performance
Target FPGA
S6LXT45-2
Target F_MAX (MHz)
90
V6LXT130-1
180
The target F_MAX is influenced by the exact system and is provided for guidance. It is not a guaranteed value across
all systems.
DS791 June 22, 2011
www.xilinx.com
43
Product Specification