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DS791 Datasheet, PDF (17/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller | |||
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LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
Bit Timing Register
The Bit Timing Register (BTR) specifies the bits needed to configure bit time. Specifically, the Propagation Segment,
Phase segment 1, Phase segment 2, and Synchronization Jump Width (as defined in CAN 2.0A, CAN 2.0B, and ISO
11898-1) are written to the BTR. The actual value of each of these fields is one more than the value written to this
register. Table 13 shows the bit positions in the BTR and Table 14 provides BTR bit descriptions.
Table 13: Bit Timing Register Bit Positions
0â22
23â24
Reserved
SJW[1..0]
25â27
TS2[2..0]
28â31
TS1[3..0]
Table 14: Bit Timing Register Bit Descriptions
Bit(s)
Name
Core
Access
Default
Value
0â22
Reserved
Read/Write
0
23â24
SJW[1..0]
Read/Write
0
25â27
TS2[2..0]
Read/Write
0
28â31
TS1[3..0]
Read/Write
0
Description
Reserved: These bit positions are reserved for future expansion
Synchronization Jump Width: Indicates the Synchronization
Jump Width as specified in the CAN 2.0A and CAN 2.0B
standard. The actual value is one more than the value written to
the register.
Time Segment 2: Indicates Phase Segment 2 as specified in
the CAN 2.0A and CAN 2.0B standard.
The actual value is one more than the value written to the
register.
Time Segment 1: Indicates the Sum of Propagation Segment
and Phase Segment 1 as specified in the CAN 2.0A and CAN
2.0B standard.
The actual value is one more than the value written to the
register.
The following equations can be used to calculate the number of time quanta in bit-time segments:
tTSEG1 = tq*(8*TSEG1[3]+4*TSEG1[2]+2*TSEG1[1]+TSEG1[0]+1)
tTSEG2 = tq*(4*TSEG2[2]+2*TSEG2[1]+TSEG2[0]+1)
tSJW = tq*(2*SJW[1]+SJW[0]+1)
where tTSEG1, tTSEG2, and tSJW are the lengths of TS1, TS2, and SJW.
Note: A given bit-rate can be achieved with several bit-time configurations, but values should be chosen after careful
consideration of oscillator tolerances and CAN propagation delays. For more information on CAN bit-time register settings, see
the CAN 2.0A, CAN 2.0B, and ISO 11898-1 specifications.
DS791 June 22, 2011
www.xilinx.com
17
Product Specification
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