DS791 Datasheet, PDF (29/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller

LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
Acceptance Filter Register
The Acceptance Filter Register (AFR) defines which acceptance filters to use. Each Acceptance Filter ID Register
(AFIR) and Acceptance Filter Mask Register (AFMR) pair is associated with a UAF bit.
When the UAF bit is '1', the corresponding acceptance filter pair is used for acceptance filtering. When the UAF bit
is '0', the corresponding acceptance filter pair is not used for acceptance filtering. The AFR exists only if the Number
of Acceptance Filters parameter is not set to '0.'
To modify an acceptance filter pair in Normal mode, the corresponding UAF bit in this register must be set to '0.'
After the acceptance filter is modified, the corresponding UAF bit must be set to '1.'
These conditions govern the number of UAF bits that can exist in the AFR:
• If the number of acceptance filters is 1:UAF1 bit exists
• If the number of acceptance filters is 2:UAF1 and UAF2 bits exist
• If the number of acceptance filters is 3:UAF1, UAF2 and UAF3 bits exist
• If the number of acceptance filters is 4:UAF1, UAF2, UAF3 and UAF4 bits exist
• UAF bits for filters that do not exist are not written to
• Reads from UAF bits that do not exist return '0's
• If all existing UAF bits are set to '0', all received messages are stored in the RX FIFO
• If the UAF bits are changed from a '1' to '0' during reception of a CAN message, the message may not be stored
in the RX FIFO.
Table 34 shows the bit positions in the AFR and Table 35 gives the AFR bit descriptions.
Table 34: Acceptance Filter Register Bit Positions
0 — 27
28
29
30
31
Reserved
UAF4
UAF3
UAF2 UAF1
DS791 June 22, 2011
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Product Specification