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DS791 Datasheet, PDF (28/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller
LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
Table 33: Data Word 1 and Data Word 2 Bit Descriptions
Register
Field
Core Access
Default
Value
Description
DW1R
[0..7]
DB0[7..0]
Read/Write
0
Data Byte 0: Reads from this field return invalid data if the
message has no data.
DW1R
[8..15]
DB1[7..0]
Read/Write
0
Data Byte 1: Reads from this field return invalid data if the
message has only 1 byte of data or fewer.
DW1R
[16..23]
DB2[7..0]
Read/Write
0
Data Byte 2: Reads from this field return invalid data if the
message has 2 bytes of data or fewer.
DW1R
[24..31]
DB3[7..0]
Read/Write
0
Data Byte 3: Reads from this field return invalid data if the
message has 3 bytes of data or fewer.
DW2R
[0..7]
DB4[7..0]
Read/Write
0
Data Byte 4: Reads from this field return invalid data if the
message has 4 bytes of data or fewer.
DW2R
[8..15]
DB5[7..0]
Read/Write
0
Data Byte 5: Reads from this field return invalid data if the
message has 5 bytes of data or fewer.
DW2R
[16..23]
DB6[7..0]
Read/Write
0
Data Byte 6: Reads from this field return invalid data if the
message has 6 bytes of data or fewer.
DW2R
[24..31]
DB7[7..0]
Read/Write
0
Data Byte 7: Reads from this field return invalid data if the
message has 7 bytes of data or fewer.
Acceptance Filters
The number of acceptance filters is configurable from 0 to 4. The parameter Number of Acceptance Filters specifies the
number of acceptance filters that are chosen. Each acceptance filter has an Acceptance Filter Mask Register and an
Acceptance Filter ID Register.
Acceptance filtering is performed in the following sequence:
1. The incoming Identifier is masked with the bits in the Acceptance Filter Mask Register.
2. The Acceptance Filter ID Register is also masked with the bits in the Acceptance Filter Mask Register.
3. The resultant values are compared.
4. If the values are equal, the message is stored in the RX FIFO.
5. Acceptance filtering is processed by each of the defined filters. If the incoming identifier passes through any
acceptance filter, the message is stored in the RX FIFO.
The following rules apply to the Acceptance filtering process:
• If no acceptance filters are selected (for example, if all the valid UAF bits in the AFR register are '0's or if the
parameter Number of Acceptance Filters = '0'), all received messages are stored in the RX FIFO.
• If the number of acceptance filters is greater than or equal to 1, all the Acceptance Filter Mask Register and the
Acceptance Filter ID Register locations can be written to and read from. However, the use of these filter pairs
for acceptance filtering is governed by the existence of the UAF bits in the AFR register.
DS791 June 22, 2011
www.xilinx.com
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Product Specification