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DS791 Datasheet, PDF (31/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller
LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
Acceptance Filter Mask Registers
The Acceptance Filter Mask Registers (AFMR) contain mask bits that are used for acceptance filtering. The
incoming message identifier portion of a message frame is compared with the message identifier stored in the
acceptance filter ID register. The mask bits define which identifier bits stored in the acceptance filter ID register are
compared to the incoming message identifier.
There are at most four AFMRs. These registers are stored in a block RAM. Asserting a software reset or system reset
does not clear register contents. If the number of acceptance filters is greater than or equal to 1, all four AFMRs are
defined. These registers can be read from and written to. However, filtering operations are only performed on the
number of filters defined by the Number of Acceptance Filters parameter. These registers are written to only when the
corresponding UAF bits in the AFR are '0' and ACFBSY bit in the SR is '0.'
The following conditions govern AFMRs:
• If the number of acceptance filters is 1, AFMR 1 is used for acceptance filtering.
• If the number of acceptance filters is 2, AFMR 1 and AFMR 2 are used for acceptance filtering.
• If the number of acceptance filters is 3, AFMR 1, AFMR 2 and AFMR 3 are used for acceptance filtering.
• If the number of acceptance filters is 4, AFMR 1, AFMR 2, AFMR 3 and AFMR 4 are used for acceptance
filtering.
• Extended Frames: All bit fields (AMID [28..18], AMSRR, AMIDE, AMID [17..0] and AMRTR) need to be
defined.
• Standard Frames: Only AMID [28..18], AMSRR and AMIDE need to be defined. AMID [17..0] and AMRTR
should be written as '0'.
Table 36 shows the bit positions in the AFMR and Table 37 provides bit descriptions.
Table 36: Acceptance Filter Mask Registers Bit Positions
0 — 10
11
12
13 — 30
31
AMID[28..18]
AMSRR
AMIDE AMID[17..0] AMRTR
DS791 June 22, 2011
www.xilinx.com
31
Product Specification