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DS791 Datasheet, PDF (36/46 Pages) Xilinx, Inc – LogiCORE IP AXI Controller
LogiCORE IP AXI Controller Area Network (axi_can) (v1.03.a)
Design Implementation
Device and Package Selection
• The AXI CAN can be implemented in an FPGA listed in the Supported Device Family field in the LogiCORE
IP Facts Table. Ensure that the device used has the following attributes:
• The device is large enough to accommodate the core, and
• It contains a sufficient number of IOBs.
Location Constraints
No specific I/O location constraints.
Placement Constraints
No specific placement constraints.
Timing Constraints
The core has two different clock domains: S_AXI_ACLK and CAN_CLK. The constraints given in the following
sections can be used with the CAN Controller.
PERIOD Constraints for Clock Nets
CAN_CLK
The clock provided to CAN_CLK must be constrained for a clock frequency of less than or equal to 24 MHz,
based on the input oscillator frequency.
# Set the CAN_CLK constraints
NET "CAN_CLK" TNM_NET = "CAN_CLK";
TIMESPEC "TS_CAN_CLK" = PERIOD "CAN_CLK" 40 ns HIGH 50%;
S_AXI_ACLK
The clock provided to S_AXI_ACLK must be constrained for a clock frequency of 100 MHz or less.
# Set the S_AXI_ACLK constraints
# This can be relaxed based on the actual frequency
NET "S_AXI_ACLK" TNM_NET = "S_AXI_ACLK";
TIMESPEC "TS_S_AXI_ACLK" = PERIOD "S_AXI_ACLK" 10 ns HIGH 50%;
Timing Ignore Constraints
For all the signals that cross clock domains, the following timing ignore (TIG) constraints are specified in the default
UCF of the axi_can core. This default UCF is created in the implementation directory, under the core’s wrapper files’
directory.
# Timing Ignore constraint on all signals that cross from CAN_CLK domain to S_AXI_ACLK domain
TIMESPEC "TS_CAN_SYS_TIG" = FROM "CAN_CLK" TO "S_AXI_ACLK" TIG;
# Timing Ignore constraint on all signals that cross from S_AXI_ACLK domain to CAN_CLK domain
TIMESPEC "TS_SYS_CAN_TIG" = FROM "S_AXI_ACLK" TO "CAN_CLK" TIG;
The user must ensure that these default constraints are removed when both the clocks are driven from the same net.
DS791 June 22, 2011
www.xilinx.com
36
Product Specification