DS742 Datasheet, PDF (27/33 Pages) Xilinx, Inc – Programable clock phase and polarity

LogiCORE IP AXI Serial Peripheral Interface (AXI SPI) (v1.02.a)
Table 18: Performance and Resource Utilization Benchmarks on a Kintex-7 FPGA (xc7v285tffg484-31)
Parameter Values
(other parameters at default values)
Device Resources
Performance
Slices
Slice Flip-
Flops
LUTs
Fmax (MHz)
0
2
2
1
2
2
0
4
2
1
4
2
0
32
2
1
32
2
8
109
156
200
200
8
119
156
253
200
8
92
167
222
200
8
118
167
270
200
8
107
171
223
200
8
119
171
270
200
The core resource utilization for various parameter combinations measured with a Virtex^®-6 FPGA as the target
device are detailed in Table 19.
Table 19: Performance and Resource Utilization Benchmarks on a Virtex-6 FPGA (xc6vlx130tff1156-1)
Parameter Values
(other parameters at default values)
Device Resources
Performance
Slices
Slice Flip-
Flops
LUTs
Fmax (MHz)
0
2
2
1
2
2
0
4
2
1
4
2
0
32
2
1
32
2
8
79
138
166
209
8
92
139
208
192
8
96
149
290
193
8
101
149
224
206
8
82
153
200
192
8
112
153
224
182
The AXI SPI IP core resource utilization for various parameter combinations measured with a Spartan^®-6 FPGA as
the target device are detailed in Table 20.
DS742 January 18, 2012
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