W89C841F Datasheet, PDF (77/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
Df4/DFEMR Function Event Mask Register
This register gives software the ability to control what events in the function cause the Status Changed
interrupts or the host system Wakeup. This register controls the assertion of the signals INTAB and
CSTSCHG in a CardBus system.
BIT
31:16
15
14
13:5
4
3:0
ATTRIBUTE
R
R/W
Sticky bit,
R/W
R
Sticky bit,
R/W
R
BIT NAME
---
INTR_
EN
WKUP_
EN
---
GWAKE_
EN
---
DESCRIPTION
Reserved. Fixed to 0.
Interrupt Enable
Setting 1 enables the INTR in the function Event register to
generate interrupt on the INTAB pin.
Wake-up Enable
Setting 1, enables the GWAKE bit in the register Df0/DFER
to generate the Wakeup event on the CSTSCHG line if the
GWAKE_En field is set together. When this bit reset to 0, the
Wakeup function is disable.
This bit defaults to 0 if PMEB generation from D3_cold is not
supported. If PMEB generation from D3_cold is supported, then
this bit is sticky and must be explicitly cleared by the
operating system each time it is initially loaded.
Reserved. Fixed to 0.
General Wake-up Enable
Setting 1, enables the GWAKE bit in the register Df0/DFER
to generate the Wakeup event on the CSTSCHG line if the
WKUP field is also set .
When reset to 0, the Wakeup function is disable.
This bit defaults to 0 if PMEB generation from D3_cold is not
supported. If PMEB generation from D3_cold is supported, then
this bit is sticky and must be explicitly cleared by the
operating system each time it is initially loaded.
Note: When W89C841F is configured into CardBus system, setting or
clearing PME_En bit in register Fe0/FPMR1[8] will also setting or
clearing GWAKE_EN & WKUP_EN bits at the same time. Bits
GWAKE_EN & WKUP_EN are allowed to be reset after setting
PME_En bit.
Reserved. Fixed to 0.
- 77 -
Publication Release Date: October 18, 2001
Revision A3