W89C841F Datasheet, PDF (15/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
Power Management Interface, continued
SIGNAL NAME PIN TYP. PIN NO.
WOL/
O
114
CSTSCHG
DESCRIPTION
Wake on LAN Signal
The WOL signal indicates that a wake up event (Magic
Packet, Link Status change and Wake-up frame) has
been received. It is used to inform motherboard to
execute wake-up process. The motherboard must
support Wake-On-LAN.
There are 4 types of output: active high (default), active
low, positive pulse, negative pulse.
CSTSCHG signal:
This signal is used in CardBus application only and is
used to inform motherboard to execute wake-up
process whenever there is PMEB occurs. It is always
an active high signal.
BootROM/Flash and EEPROM Interface
SIGNAL NAME
BtAdd[17:14]/
RXD[3:0]_MAC/
RXD[3:0]_PHY
BtAdd[13]/
RXDV_MAC/
RXDV_PHY
BtAdd[12]/
RXCLK_MAC/
RXCLK_PHY
PIN TYP.
I/O/
I/
O
I/O/
I/
O
I/O/
I/
O
PIN NO.
73,
72,
69,
68
67
66
PIN DESCRIPTION
BootROM Address (Normal Mode)
These pins are used as ROM address pins.
MII Receive Data (MAC mode)
These pins are used to input MII RXD signals.
MII Receive Data (PHYceiver mode)
These pins are used to output MII RXD signals.
BootROM Address (Normal Mode)
This pin is used as ROM address pin.
MII Receive Data Valid (MAC mode)
This pin is used to input MII RXDV signal.
MII Receive Data Valid (PHYceiver mode)
This pin is used to output MII RXDV signal.
BootROM Address (Normal Mode)
These pins are used as ROM address pin.
MII Receive Clock (MAC mode)
This pin is used to input MII RXCLK signal.
MII Receive Clock (PHYceiver mode)
This pin is used to output MII RXCLK signal.
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Publication Release Date: October 18, 2001
Revision A3